CVE-2020-0574
Published Mar 12, 2020
Last updated 3 years ago
Overview
- Description
- Improper configuration in block design for Intel(R) MAX(R) 10 FPGA all versions may allow an authenticated user to potentially enable escalation of privilege and information disclosure via physical access.
- Source
- secure@intel.com
- NVD status
- Analyzed
Social media
- Hype score
- Not currently trending
Risk scores
CVSS 3.1
- Type
- Primary
- Base score
- 5.9
- Impact score
- 5.2
- Exploitability score
- 0.7
- Vector string
- CVSS:3.1/AV:P/AC:L/PR:L/UI:N/S:U/C:H/I:H/A:N
- Severity
- MEDIUM
CVSS 2.0
- Type
- Primary
- Base score
- 3.6
- Impact score
- 4.9
- Exploitability score
- 3.9
- Vector string
- AV:L/AC:L/Au:N/C:P/I:P/A:N
Weaknesses
- nvd@nist.gov
- NVD-CWE-noinfo
Configurations
[
{
"nodes": [
{
"negate": false,
"cpeMatch": [
{
"criteria": "cpe:2.3:o:intel:max_10_fpga_firmware:*:*:*:*:*:*:*:*",
"vulnerable": true,
"matchCriteriaId": "0BCAEFD4-D033-4CC4-9A61-2B92DE141A9E"
}
],
"operator": "OR"
},
{
"negate": false,
"cpeMatch": [
{
"criteria": "cpe:2.3:h:intel:max_10_fpga:-:*:*:*:*:*:*:*",
"vulnerable": false,
"matchCriteriaId": "A7461471-ED45-45A4-84C6-DC9F28893437"
}
],
"operator": "OR"
}
],
"operator": "AND"
}
]